The increasing demand for complex LSI circuits of both the bipolar and metal oxide semiconductors (MOS) devices have made imperative the development of practical methods for reliable metallization of these devices. Bipolar integrated circuits have been and are now being produced with multiple levels of metal with good results. Many different approaches have been employed to fabricate multilevel metal devices for bipolar LSI and vary from being quite simple to rather complex. Some of these approaches are discussed in an article entitled "Multilayer Metallization for LSI," by C. J. Santoro and D. L. Oliver, Proceedings Of The IEEE, volume 59, No. 10, October, 1971, page 1403. At the present time, most bipolar LSI multilevel devices use aluminum or an aluminum based alloy deposited by electron-beam evaporation, and the insulator is usually silicon dioxide deposited by chemical vapor deposition.
However, there has been very little, if any, fabrication of metal oxide semiconductor (MOS) devices by utilizing multiple layers of metal. This has been primarily due to concern by MOS manufacturers of yield loss and reliability problems in using multilevels of metal on MOS devices. The MOS transistor, a surface effect device, utilizes a thin gate dielectric (silicon dioxide) that is very sensitive to the ionic bombardment produced by conventional deposition techniques. Unlike the bipolar transistor, a bulk effect device, the MOS device cannot tolerate the levels of ion-bombardment produced by conventional RF sputtering, and must be specially treated to anneal out the charges induced in the thin gate dielectric by electron-beam evaporation. Although in the case of electron-beam evaporation much of the induced change can be annealed out thereby limiting the adverse affect on the electrical parameters, the heating cycle (annealing) needed for this step in the process increases hillock growth in the metal layers and this is a major cause of intermetal shorts. Hillock growth can be reduced considerably, and in some cases almost eliminated, by using aluminum alloys. Electron-beam evaporation of aluminum alloys, however, poses numerous problems such as (1) difficulty in obtaining reproducibility, (2) frequent recharging of sources, (3) consistency of deposition, (4) essentially limited to a two material alloy, and (5) roughness on the surface adversely affects the photo masking operation.
At the present time, two methods are generally used to provide multiple levels of interconnect for various elements of an MOS circuit. The first method consists of a diffused conductor, an insulator, and one metal layer. The conductor is diffused at the same time as the source and drain of the MOS device. In this method, with a single layer of metallization, crossovers can only be achieved by a metal conductor crossing over the top of a diffused conductor with the oxide layer acting as an insulator.
Another method used to provide multilevel metallization of an MOS device is polycrystaline silicon, an insulator, and a metal. Polycrystaline silicon may be vapor deposited onto a silicon substrate having a thermally grown silicon dioxide layer with an insulating layer deposited over the polycrystaline silicon. A metal, usually aluminum or an aluminum alloy, is then deposited to provide the second level of interconnects.
The disadvantage of the first method is that the resistance of the diffused conductor is much higher than that of the metal. This relatively high resistance coupled with the capacitance of the insulating oxide layer reduces the response time of the line to electrical signals. The polysilicon used in the second method, while having manufacturing advantages over the diffused conductor, also places a constraint on the circuit speed due to the relative high sheet resistivity thereof.